A NOR flash memory has heretofore been often used as an electrically writable or erasable flash memory. In the NOR flash memory, its storage capacity is increased, and writing/erasing is performed on a high-capacity basis.
In recent years, there has been a desire to perform writing/erasing on a low-capacity basis in such a NOR flash memory.
Accordingly, in some NOR flash memories, a well region is separated for each sector, and a decoder is independently provided for each sector, in order to minimize the effect of disturbance in writing/erasing (for example, see Jpn. Pat. Appln. KOKAI Publication No. 2001-43691).
However, in order to obtain a low-capacity sector, the number of separated well regions is increased, and a column decoder has to be provided for each of the increased well regions (sectors). This disadvantageously leads to an increased chip size.